at Intel in Boise, Idaho, United States
Job DescriptionJob Description
As a CAD Research Intern in the Design Enablement Test Chip Engineering (TCE) group, you will be responsible for the research and development of CAD software tools and flows, methodologies, and processes to support the design of Intel's next generation process technology test chips.
Your responsibilities will include but not be limited to:-
- Development of CAD software/flows that automate physical layout of E-Test Structure devices and connectivity, layout dummification, design verification within a customized physical design framework.
- Definition of process design rules to make designs conform to process requirements.
- Collaborating with other manufacturing groups to define test structure designs.
- Troubleshoot design and DRC verification issues with complex physical designs flows and tools.
- Develop software to increase automation and productivity.
- The candidate is expected to work closely with the team but carry out research, development, and test tasks with minimal supervision.
This is a remote internship position for 3+ months and compensation will be given accordingly.
\#DesignEnablement
Qualifications
You must possess the below requirements to be initially considered for this position. Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications:
Candidate must be actively pursuing a MS degree in Electrical Engineering, Computer Science Engineering, or related field.
6+ months of experience in following areas:
- One of the following: Python, Perl, Tcl, SKILL, C++.
- Solving problems using efficient computer algorithm and effective programming techniques.
- UNIX/Linux or Shell.
- CAD tools for schematic entry, circuit simulation, custom layout, and design/layout verification, from vendors such as Cadence, Synopsys, and Siemens.
Preferred Qualifications:
6+ months of experience in the following:
- Physical design or CAD.
- Development of PCells or PyCells.
- Calibre SVRF and/or Cadence SKILL languages.
- Developing custom flows for EDA Tools using AI/ML concepts.
- Semiconductor device physics and process scaling.
Inside this Business Group
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art - from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world cla
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