Field Programmable Gate Array Design Engineer

The vision at Sidus is to make space accessible to everyone by increasing the viability of low-cost access to space. At Sidus, our whole is greater than the sum of our parts. The Sidus team is made up of highly talented individuals, each contributing their own experience, knowledge, skills, and ideas. It is our team that sets us apart from our competition and makes our mission of Bringing Space Down to Earth™.

Job Summary

The Field Programmable Gate Array (FPGA) Design Engineer is responsible for designing, developing, and testing digital logic circuits, implementing new hardware architectures, and writing firmware to control and configure FPGA-based systems.

Essential Duties and Responsibilities

• Full life cycle development and integration of Verilog/VHDL into different families of FPGAs
• Firm understanding of FPGA design process including requirements, preliminary design, peer reviews, detailed design, test plan generation, and integration and test
• Perform architectural design-including block diagram, trade off studies and design reviews
• Create self-checking and reusable test benches from scratch
• Develop functional coverage models and close code coverage
• Create written test cases, procedures and document results
• Integrate with HW/software supporting lab integration and complete testing/qualification of a deliverable system
• Support board level FPGA integration
• Perform detailed design reviews

• Treat all team members with respect and dignity ensuring a collaborative culture is continually developed and maintained.
• Other duties as assigned**

Required Education and Experience

• Experience in aerospace engineering, computer science, programming hardware, or other relevant industry experience
• Bachelor’s degree in aerospace engineering, computer science, or another relevant STEM field. Experience in lieu of education may be considered.

• VHDL or Verilog experience
• Experience with hand coded implementations, above and beyond incorporating vendor COTS IP
• Testbench development for the verification of RTL blocks
• Familiarity using FPGA simulation and synthesis tools (e.g. Questasim, Synplify, Modelsim, Xilinx ISE and Vivado)
• Strong oral and written communication skills and the ability to document and present work status

• Proficiency in Microsoft 365 including Excel, Word, Outlook and Teams.

Desired Skills and Experience

• Commitment to providing the highest quality products and services that meet or exceed the requirements and expectations of our customer, actively pursuing opportunities for continual improvements of service quality.

• Experience verifying ASICs / FPGAs
• Experience with building and setting up scalable simulation/verification environments
• Experience with and understanding of Altera and/or Xilinx FPGA architectures
• Good understanding of the Vivado and/or Quartus tool suite
• Revision Control Systems: svn, git
• Proficient in Linux Environments
• Experience with high-speed memory interfaces (DDRx)
• Familiarity with test scoping for complex designs, code coverage, functional coverage, assertions
• Ability to focus on finding design issues, corner cases and out of box ideas to make designs more robust
• Experience with high-speed serial protocols (PCI Express, SRIO, Ethernet, LVDS, CameLink)
• Experience with Analog to Digital (AD) and Digital to Analog (DA) interfaces
• Experience with control protocols such I2C, SPI, RS-232/422
• FPGA lab validation with lab equipment (e.g Oscilloscopes, Logic Analyzers)
• Experience with Unix, scripting C, Python, bash/csh,
• Experience with embedded System-On-Chip technologies, radio systems development

• Ability to collaborate with many different teams/individuals to reach a common goal by building mutual trust, respect, and cooperation maintaining positive and professional relationships, and contributing to a culture of inclusion.

Physical Requirements

• Stationary Work – occasionally exerting up to 10 pounds of force to transport objects, remaining mostly stationary, sometimes requiring moving about the work center on concrete surfaces
• Computer Work – daily use of laptop, computer monitor screen, keyboard, and mouse, sometimes utilizing a headset with microphone & speakers.

Travel Requirement

Able to travel <10% of the time. (Or however often needed to be onsite)

Shift/Schedule
This position is for the day shift generally working 8:00am – 5:00pm.

Total Rewards and Perks:

At Sidus Space, we ask a lot of our team members, which is why we give so much in return. In addition to a competitive salary, a Best-in-Class benefit program with a generous employer paid portion as well as a matching 401(k) on Day ONE, we offer a lot of perks, including:

• Jeans every day
• Regular onsite food trucks
• 5 free company t-shirts for Manufacturing Staff or credit to the Company Store
• Paid Time Off - Up to 4 weeks of vacation, 5 sick days, and 11 paid holidays – 5 of which can be floated
• Adjustable stand-up desks
• Employee referral bonus program
• Educational assistance and professional training opportunities
• Company golf outings and other social events

Additional Eligibility Qualifications

• All candidates selected will be subject to background investigation and drug screen
• To conform to Export Control Requirement under U.S. Government International Traffic in Arms Regulations (ITAR) you must be a U.S Person (U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3)), or eligible to obtain the required authorizations from the U.S. Department of State.
• Must be able to perform the essential functions of the position satisfactorily and, if requested, reasonable accommodations will be made to enable individuals with disabilities to perform the essential functions of their job, absent undue hardship.

SIDUS SPACE is an Equal Opportunity Employerfostering a respectful work culture based on diversity, equity, and inclusion that values all contributors. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity or expression, pregnancy, age, national origin, disability status, genetic information, protected veteran status, or any other characteristic protected by law.For more information on “EEO Is the Law,” please visit https://www.dol.gov/sites/dolgov/files/ofccp/regs/compliance/posters/pdf/eeopost.pdf

Affirmative Action and Disability Accommodation

Applicants wishing to receive information on Sidus Space’ Affirmative Action Plans, or applicants requiring a reasonable accommodation in order to participate in the application and/or interview process, please contact us at people@sidusspace.com