Soc Design Engineer - Pre-Silicon Validation

Job Details:
Job Description:
Come join Intel's Devices Development Group as a Pre-Silicon System Validation engineer. In this role you will be working as part of a pre-silicon validation team for future Intel SoCs or IPs.
Your responsibilities will include but not be limited to:

• Validation of an IP at the IP or system level
• Creating plans and tests for validating portions of a complex microarchitecture using written specs, RTL code and other tests as a guide
• Learning the architecture and microarchitecture by debugging failures to the root cause
• Developing and utilizing various debug and validation tools and/or methodologies to implement validation plans with the goal being to ensure a solid design
• Participating in the debug of failures on silicon and developing new testing strategies to detect these failures on RTL models
• System level validation tasks such as using FPGAs and emulators
• Developing high level (for example, System C) modeling for RTL components
• Developing debugging tools and software

The ideal candidate should exhibit the following behavioral traits:

• Problem-solving skills
• Strong written and verbal communication skills
• Ability to work in a dynamic and team oriented environment.

Qualifications:
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. The requirements of the position should align with knowledge obtained through school work, classes and project work, internships, military training, and/or work experience. This is an entry level position and will be compensated accordingly.
Minimum Qualifications:
Must have either a BS in Computer Science, Computer Engineering or Electrical Engineering or any STEM related degree.
Minimum 3 months experience with reading and interpreting technical specs and Register Transfer Level (RTL) code.
Minimum 3 months experience with writing validation plans and software to implement those validation plans.
Minimum 3 months experience with UNIX or Linux
Preferred Qualifications:
Minimum 6 months experience with computer architecture
Minimum 6 months experience with IA-32 assembly and/or Verilog programming experience
Minimum 6 months experience with validation or testing experience, especially in a silicon design team.
Job Type:
College Grad
Shift:
Shift 1 (United States of America)
Primary Location:
US, Oregon, Hillsboro
Additional Locations:
Business group:
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel's products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore's Law and groundbreaking innovations. DEG is Intel's engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.