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Form of workJob Description
Key Responsibilities:
Performs development and characterization experiments for next-generation PDebug tools and technologies for analysis on advance package Foveros and advance process node PowerVia technologies
Responsibilities include working on in-lab solutions for die-to-die assembly; package reconstruction, silicon reconstruction, and nanomachining applications research and development
Evaluates and resolves component engineering design and physical design issues.
Ensures products have the necessary design for debug features to enable deep silicon isolation capabilities. Utilises system setups, testing equipment, automated systems, and lab probe/FIB/prep tools to isolate microscopic silicon circuits while under test.
Performs fault isolation to root cause silicon failures, isolates defect modes, and engages with cross-functional teams such as test and validation engineers, circuit designers, wafer fabrication process engineers, and high volume manufacturing for efficient and accelerated failure analysis.
Partners to resolve quality issues, sharing ownership of failure analysis, temporary mitigation options, and permanent remedies.
Provides inputs on investigation areas for failure analysis or design process improvement and ensures performance to specifications.
Develops new debug technologies, methodologies, and tools to advance the state of the art for silicon debug
Additional responsibilities include supporting development integration and debug for new tools; overseeing SW/HW upgrades for existing PDebug tools; and working with researchers, suppliers, and internal customers on TSPEC generation and ramping new debug technologies from development to production
Qualifications
Minimum Qualifications:
Master's or PhD in Material Science, Chemical Engineering, or equivalent
5+ years' experience in semiconductor device analytical technologies, advance packaging analysis technologies, and advanced assembly and semiconductor manufacturing
Experience/knowledge in charged particle beam systems, photonics, electron optics, and surface physics/chemistry required
Additional background in any of the following areas: Beam based nanomachining tools (such as FIB, Laser Chemical etch, or E-Beam), MEMS technology, plasma etch, CVD, submicron wafer processing, or analytical-material science technology also beneficial
Good written and verbal communication skills, problem-solving techniques, DOE methodology/project management skills, and must be able to work in a cross-organization team environment
Fluency in English; basic knowledge of German is considered an advantage
Inside this Business Group
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here.
Working Model
This role is available as a fully home-based and generally would require you to attend Intel sites only occasionally based on business need. This role may also be available as our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
JobType
Fully Remote
