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Form of workMinimum qualifications:
- Master's degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.
- 6 years of experience working in a Signal Integrity technical environment, or 5 years of experience with an advanced degree.
- 3 years of experience in technical leadership.
Preferred qualifications:
- Experience with lab measurements and analysis, including Oscilloscopes, Vector Network Analyzer (VNA), or TDR.
- Experience with the product development process for mass volume production design, with a focus on Signal Integrity and lab validation.
- Experience with SerDes testing, with an understanding of PCIE, DDR, SATA and Ethernet standards.
- Understanding of PCB, connector, or cable design and assembly processes, including materials and component selection.
- Understanding of SerDes capabilities, FEC and its implications for system design.
- Understanding of high speed digital interconnect design, component-level and integrated system testing, transmission line theory, and electromagnetic theory.
About the job
Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.
With your technical expertise, you lead projects in multiple areas of expertise (i.e., engineering domains or systems) within a data center facility, including construction and equipment installation/troubleshooting/debugging with vendors.
Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.
The US base salary range for this full-time position is $166,000-$254,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target for new hire salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.
Responsibilities
- Lead System Signal Integrity (SI) design on data center hardware products.
- Collaborate with board, chip and system engineers, design partners and chip vendors to drive system SI design. Explore layout and manufacturability trade-offs, and ensure product functions as needed.
- Drive ASIC, package, board, connector, and cable vendors to develop new interconnect technologies.
- Manage system interconnect bring-up and qualification, working with test engineers, including configuring chips to ensure adequate margin.
- Drive solutions for SI issues with design engineers, PCB designers, and system team. Run trade-off analysis on performance and cost.
