Staff - Asic Digital Design Engineer

Job Description and Requirements
You will be a senior member of the PCIe interface IP solutions R&D team. The candidate will be part of the IP Verification R&D team at Synopsys could be located in either Austin or Sunnyvale. He/She will be expected to specify, design/architect and implement state-of-the-art Verification environments that perform Verification tasks for the IP cores.
You will work with our worldwide-based team of architects/designers/other verification team members to specify requirements and follow through on the implementation. This is a key position delivering digital IP to the semiconductor industry. You will:

• Work with the design team to define the verification requirements.
• Develop test plans from a specification document.
• Develop of functional verification test environment both at unit level and system level.
• Write UVM verification test bench architecture, agents, and test sequences.
• Review test plans and verification code,
• Implement SVA for functional and formal verification.
• Implement coverage and review coverage results.
• Meeting quality metric goals and regression management

Key Qualifications:

• BS in EE with 12+ years of relevant experience or MS with 10+ years of relevant experience in the verification of IP cores and/or SOC RTL designs.
• Must have experience in architecting and developing HVL (System Verilog) based test environments, developing, and implementing test plans, implementing and extracting verification metrics such as functional coverage.
• Must have strong HVL coding skills for Verification and be hands-on with one or more Industry standard simulators.
• Exposure to verification methodologies such as VMM/OVM/UVM/ is required.
• Knowledge of one or more of protocols PCIe, AXI/AMBA, USB, CXL
• Exposure to PCIe IP design and verification is an added advantage.
• Programming skills such as C, System Verilog, TCL Perl or Python
• There will be strong focus on functional coverage driven methodology. So the corresponding mindset is a must.
• The ability to work autonomously, precisely, and to drive innovation
• It is essential that the individual has good written and oral communication skills and is able to demonstrate good analysis, debug and problem solving skills and show high levels of initiative.

ABOUT US
At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Our Silicon Design & Verification business is all about building high-performance silicon chips-faster. We're the world's leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance-eliminating months off their project schedules.
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Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
The base salary range across the U.S. for this role is between $111,000-$194,000. In addition, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request.