Job description
As an ASIC Design Engineer in the Pixel IP DMA team, you will work closely with architecture, design, and verification teams to build commitment and low power DMA engines. Apply your knowledge of flow control, arbitration, cache design, compression, pipelining, sequencers, and other techniques to coordinate moving large amounts of data between the memory subsystem and the Apple Neural Engine Core (ANE). In this front-end design role, your tasks will include: - Coding high-quality RTL, with embedded assertions and cover points. - Writing detailed micro-architectural specifications. - Collaborating with multi-functional teams to explore solutions that enhance performance while minimizing power and area. - Working closely with design verification and formal verification teams to debug and verify functionality and performance.
Address
Cupertino, CA
