Company

Tekwissen LlcSee more

addressAddressSanta Clara, CA
type Form of workFull-Time
CategoryInformation Technology

Job description

Job Description

Overview:
TekWissen Group is a workforce management provider throughout the USA and many other countries in the world. This Client is an American multinational semiconductor company based in Santa Clara, California, that develops computer processors and related technologies for business and consumer markets. global company that specializes in manufacturing semiconductor devices used in computer processing. The company also produces flash memories, graphics processors, motherboard chip sets, and a variety of components used in consumer electronics goods.

Job Title: ASIC/RTL Design Engineer - Senior
Work Location: Santa Clara, CA, 95054
Duration: 6 Months
Work Type: Contract
Job Type: Hybrid

JOB DUTIES:
  • Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff
  • Drive the effort to maintain RTL quality metrics in complex, hierarchical designs and automating that process for improved efficiency.
  • Drive the pre-route timing checks and QoR clean up to eliminate SDC issues and ensure a quality handoff for STA checks
  • Work with CAD on the development of pre-production synthesis (Design Compiler) and STA (Primetime) flows
  • Requires a mix of SDC knowledge, EDA tool competence and Tcl based scripting capability (in both EDA environment and standalone Linux Tcl shell scripts)
  • Constantly review/identify the places to improve the process and ways to identify the issues early in the design phase.
PREFERRED EXPERIENCE:
  • Worked with EDA tools that enable RTL quality checks
  • Hands on experience in building the timing constraints for IPs, blocks and Full-chip implementation in both flat/hierarchical flows.
  • Experience with analysing the timing reports and identifying both the design and constraints related issues.
  • Ability to multitask, grasp new flows/tools/ideas
  • Experience in improving the methodologies.
  • Preferred EDA tool experience: Synopsys Design Compiler/Primetime, Spyglass, Fishtail etc.
TekWissen Group is an equal opportunity employer supporting workforce diversity.
Refer code: 8895141. Tekwissen Llc - The previous day - 2024-04-05 16:40

Tekwissen Llc

Santa Clara, CA
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