Wireless Soc Design Engineer

Company	HardwareSee more
Address	Irvine, CA
Category	Information Technology

Job description

- Develop microarchitecture and RTL for a System-on-Chip (SoC) IP design, aligning with specified functional requirements. - Engage in hardware/software partitioning discussions alongside software and firmware engineering teams. - Collaborate with physical design, design for testability (DFT), power management, and computer-aided design (CAD) teams to finalize and deliver fully functional IP for SoC integration. - Provide support to verification, prototyping, and emulation teams during pre-silicon verification phases, as well as software/firmware development. - Assist in post-silicon validation, system integration, and debugging efforts, and address any necessary silicon design revisions promptly.

Request

Proficient in digital design fundamentals, with a strong foundation.
Skilled in defining ASIC microarchitecture to meet functional requirements while managing performance, power, and area trade-offs.
Knowledgeable about the ASIC design flow, including System Verilog RTL implementation, Lint, Synthesis, STA, and LEC.
Expertise in various areas such as memory subsystems, bus interfaces, CPU integration, DMA engines, Compression, Security IP design, and high-speed/low-speed peripherals like PCIE, QSPI, UART, and SPMI is a plus.
Thorough understanding of cross clock-domain design principles and associated CDC requirements.
Familiarity with ASIC low power design techniques, including multiple supply domains configuration, dynamic power/clock scaling, and power analysis, is a plus
Familiarity with ASIC test methodologies, encompassing DFT, scan insertion, memory BIST, and other related techniques.
Excellent organizational skills.
Strong communication skills, both written and oral.
BS and 10+ years of relevant industry experience. MS Preferred

Refer code: 9074995. Hardware - The previous day - 2024-04-18 06:03

Wireless Soc Design Engineer

HardwareSee more

Job description

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