AddressDescription
As a DFT Engineer in Kansas City, your main responsibility will be to collaborate with teams across multiple sites to ensure successful design implementation and tape-outs. This will involve driving DFT architectures, methodologies, and tool flows for complex designs with Analog/high bandwidth SerDes components.
Key Responsibilities:- Developing DFT architectures, methodologies, and tool flows for multi-million gate designs with Analog/high bandwidth SerDes components
- Understanding ATE and wafer bring up processes, and working with the test engineering team to ensure successful silicon bring up and test program development
- Collaborating with the team to define the test plan and developing functional/structural tests for final/wafer test program development
- Working closely with the team to define HTOL test suite, cycle times, and bring up on burn-in PCB boards
- Knowledge of lab bench Silicon debug and characterization
- At least 5 years of experience in DFT, including architecture specification, implementation, test pattern development, and verification
- Experience with MBIST insertion, simulation, and verification on RTL and Gate Level Netlist
- Experience with Scan insertion, Scan compression, Stuck-At, At-Speed test, and coverage analysis
- Experience with Scan
