Project Kuiper is a new initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world.
Key job responsibilities
The Role:
Create FPGA solutions to support Amazon Project Kuiper's satellite communication system. This is a unique opportunity to define a groundbreaking new system with few legacy constraints. The Sr FPGA validation engineer will work with FPGA, ASIC, PCB and systems teams to define and create lab based test environments intended to characterize and prove out functionality of FPGA designs qualifying them for release to enable Project Kuiper. This will focus on creating FPGA lab validation environments and test suites. This role will be using the latest generations of FPGA technologies and modern FPGA design processes and tools.
In this role you will:
- Create and release FPGAs through the development phases of uArchitecture-RTL Design-Physical Implementation-Timing Closure-Simulation Validation- Lab Based Silicon Validation
- Collaborate with network communication system architects to define and design/implement/test/release/support networking functions targeted to FPGA technology
- Collaborate with Digital Communications/RF/Signal Processing system architects and design engineers to implement digital logic functions in FPGA technology
- Collaborate with system architects and design engineers to implement digital logic functions in FPGA prototypes to validate/tradeoff architecture & design alternatives
- Collaborate with systems architects, HW engineering design teams & FW/SW design teams to bring up and test systems combining FPGA, firmware, RF, and Networking functions.
- Drive trade-off analysis to benefit customer experience and optimization of target technology resources for cost/size/power/performance/features
A day in the life
Create FPGA solutions to support Amazon Project Kuiper's satellite communication system. This is a unique opportunity to define a groundbreaking new system with few legacy constraints. The Sr FPGA validation engineer will work with FPGA, ASIC, PCB and systems teams to define and create lab based test environments intended to characterize and prove out functionality of FPGA designs qualifying them for release to enable Project Kuiper. This will focus on creating FPGA lab validation environments and test suites. This role will be using the latest generations of FPGA technologies and modern FPGA design processes and tools.
About the team
Kuiper Production team FPGA development team creating Kuiper shipping FPGAs.
Export Control Requirement:
Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.
We are open to hiring candidates to work out of one of the following locations:
Redmond, WA, USA | Sunnyvale, CA, USA
BASIC QUALIFICATIONS
- Bachelor's degree in Computer Engineering/Science, Electrical Engineering, related discipline, or equivalent experience
- 4+ years of experience in FPGA design & implementation & Verification
- Record of success in the design, test, delivery, support of multiple FPGAs shipping to customers
- 4+ years of experience with high-end Intel & Xilinx FPGAs
- 4+ years of experience with high-end Intel & Xilinx FPGAs with modern ASIC / FPGA design and verification tools
- 4+ years of experience with high-end Intel & Xilinx FPGAsexperience with uArchitecture, RTL coding, FPGA optimization for timing & power, simulation, and validation
- 4+ years experience planning, architecting, developing, and using constrained random, self-checking testbenches in SystemVerilog & UVM
- 4+ years experience developing and implementing test plans.
- 4+ years xperience with FPGA/ASIC design and verification tools (Synopsys, Mentor Questa, Cadence)
- Working knowledge of Ethernet, Interlaken, PCI Express, SPI, UART, and I3C protocols
PREFERRED QUALIFICATIONS
The following skills/experience are preferred, but not required:
- Hands on experience with System Verliog RTL coding
- FPGA Verification Experience w/ UVM
- Git/Jira/BitBucket
- Shell scripting/C++/Python
- Experience driving process.
- Demonstrated mentoring skills
- Experience with HLS
- Experience with TCP/IP Networking Systems
- Proven track record of successfully fielding and supporting FPGA and ASIC products
- Good analytical, problem solving and communication skills
- Understanding of TCP/IP Networking with specific familiarity of OSI layers 2-4
- Strong communication and documentation skill
Amazon is committed to a diverse and inclusive workplace. Amazon is an equal opportunity employer and does not discriminate on the basis of race, national origin, gender, gender identity, sexual orientation, protected veteran status, disability, age, or other legally protected status. For individuals with disabilities who would like to request an accommodation, please visit https://www.amazon.jobs/en/disability/us.
Our compensation reflects the cost of labor across several US geographic markets. The base pay for this position ranges from $127,300/year in our lowest geographic market up to $247,600/year in our highest geographic market. Pay is based on a number of factors including market location and may vary depending on job-related knowledge, skills, and experience. Amazon is a total compensation company. Dependent on the position offered, equity, sign-on payments, and other forms of compensation may be provided as part of a total compensation package, in addition to a full range of medical, financial, and/or other benefits. For more information, please visit https://www.aboutamazon.com/workplace/employee-benefits. Applicants should apply via our internal or external career site.