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Form of workJob Description and Requirements
At Synopsys, we're at the heart of the innovations ushering the Era of Smart Everything, ranging from self-driving cars, Artificial Intelligence, Cloud, 5G and IoT. Chip design today is more complex than ever as it needs to accurately model silicon behavior at vanishingly small geometries while handling large designs with hundreds of millions of logic gates. All while solving a series of NP-hard problems to deliver best in class clock frequencies within tight power budgets. There is a huge opportunity to innovate by developing smarter algorithms, data structures, and machine learning techniques, as we scale our industry leading digital implementation solution for the next generation of powerful chip. If you share our passion for innovation, we want to meet you.
You will be joining the digital implementation optimization R&D team in Synopsys' EDA Group and work on developing advanced algorithms in C++ to deliver cutting edge PPA (Power/Performance/Area) technology for Fusion Compiler product. In this role, you will be part of a highly experienced software development team and contribute to exciting new technologies for chip design automation, enabling leading design companies that shape our lives today.
Requirements:
The EDA Group is focused on solving the semiconductor design industry's high-value problems, including the march to angstroms, multi-die system integration, rapid node migration, right-first-time silicon, and reliability. Our full EDA software stack, spanning system architecture, design capture, verification, implementation, signoff, silicon lifecycle management (SLM), TCAD, and silicon manufacturing, enables our customers to rapidly bring high-performance chip designs to market. Our EDA stack is further augmented with hyperconvergence, AI engines, and data analytics that enable our customers to target their toughest productivity bottlenecks at every stage of chip design.
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Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
The base salary range across the U.S. for this role is between $175,000.00-$263,000.00. In addition, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request.
At Synopsys, we're at the heart of the innovations ushering the Era of Smart Everything, ranging from self-driving cars, Artificial Intelligence, Cloud, 5G and IoT. Chip design today is more complex than ever as it needs to accurately model silicon behavior at vanishingly small geometries while handling large designs with hundreds of millions of logic gates. All while solving a series of NP-hard problems to deliver best in class clock frequencies within tight power budgets. There is a huge opportunity to innovate by developing smarter algorithms, data structures, and machine learning techniques, as we scale our industry leading digital implementation solution for the next generation of powerful chip. If you share our passion for innovation, we want to meet you.
You will be joining the digital implementation optimization R&D team in Synopsys' EDA Group and work on developing advanced algorithms in C++ to deliver cutting edge PPA (Power/Performance/Area) technology for Fusion Compiler product. In this role, you will be part of a highly experienced software development team and contribute to exciting new technologies for chip design automation, enabling leading design companies that shape our lives today.
Requirements:
- Designs algorithms and data structures. Has desires to learn and explore new technologies and demonstrates good examination and problem-solving skills.
- Prior understanding and experience of EDA/CAD tool development are required.
- Possesses a deep understanding in one or more of the following areas: static-timing, logic- synthesis, P&R, optimization, and/or CTS area.
- Autonomously resolves a wide range of issues in imaginative ways on a regular basis.
- Customarily exercises autonomous judgment in selecting methods and techniques to obtain solutions.
- Contributes to complex aspects of a project.
- Work is self-directed and collaborative in nature.
- Guides more junior peers with aspects of their job.
- MS/Ph.D. + 8+ years of related large-scale EDA software development experience.
- Expertise in the development of complex software projects with C/C++ coding in a Linux environment.
- Proven background in data structures and algorithm development.
The EDA Group is focused on solving the semiconductor design industry's high-value problems, including the march to angstroms, multi-die system integration, rapid node migration, right-first-time silicon, and reliability. Our full EDA software stack, spanning system architecture, design capture, verification, implementation, signoff, silicon lifecycle management (SLM), TCAD, and silicon manufacturing, enables our customers to rapidly bring high-performance chip designs to market. Our EDA stack is further augmented with hyperconvergence, AI engines, and data analytics that enable our customers to target their toughest productivity bottlenecks at every stage of chip design.
Stay Connected: Join our Talent Community
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
The base salary range across the U.S. for this role is between $175,000.00-$263,000.00. In addition, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request.
