Junior Fpga Design Engineer

Job ID 17762
SDL supports a variety of missions, including NASA’s vision to reveal the unknown for the benefit of humankind and the Department of Defense’s aim to protect our Nation on the ground, in the air, and in space. Our sensors, satellites, software systems, and science and engineering play an essential role in some important missions you’ve heard of, and others that you haven’t. Join our team in our seventh decade of delivering mission success.
The Space Dynamics Laboratory (SDL) is in search of a junior FPGA Design Engineer to assist with the design, fabrication, test and support of electronics for telecommunication hardware for space vehicles and sensor payloads. The selected candidate will be involved in all aspects of payload algorithm discernment, development, optimization, and testing.  The selected candidate must be able to work as part of larger electronics teams, internal and external to the organization, and own all aspects of their assigned block of the design from concept to integration and test.  This position is full time and is located in Logan, UT.
SDL Benefits:
At SDL, we take pride in and highly value our employees. SDL offers competitive salaries and fantastic benefits, including:

• Generous paid leisure and sick leave, ensuring you never miss a special event
• A 14.2% employer retirement contribution into a 401(a) account—no matching required!
• Favorable company locations with average commute times of less than 15 minutes
• Utah State University undergraduate tuition discounts of 50%, full reimbursement for graduate tuition, and free course audits for employees and dependents meeting eligibility requirements
• High-quality, low-cost health, dental, and life insurance
• A great, highly educated team that works together to solve some of the most fascinating problems on (and off) our planet
• We are a growing company that maintains both a family feel and high retention rate with over 90% job satisfaction

• Must be a US citizen, lawful permanent resident of the US, or other US Person
• B.S. in electrical and/or computer engineering
• Experience working on NASA (or other US government) funded projects
• Should be comfortable with:
  • Basic digital and analog circuits
  • FPGA design
  • Embedded software
  • Ground support equipment
  • Automated test scripting
  • Experience with FPGA debugging tools and hardware troubleshooting equipment
  • Experience with static timing analysis and timing closure
• Hands-on testing and handling of space electronics in a laboratory environment

• Expertise with digital communications and software-defined radios
• Expertise with CCD applications and supporting peripherals
• Master’s Degree

For questions or assistance with the application process or the DoD SkillBridge program, please contact employment@sdl.usu.edu.

EOE including Disability and Vet

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