Address
Form of workJob Details:
Job Description:
Data Center Platform Application Engineering (DCPAE) is part of Datacenter and AI (DCAI) organization under Data Platform Engineering and Architecture group.
Reliability, Availability and Serviceability (RAS) DCPAEs are responsible for server platform error handling architecture enablement for a range of Xeon architecture-based cloud and data-center server platform ingredients including CPU, UPI, PCIe, DDR, CXL, BMC, etc. Looking for a graduate degree-level internship candidate with coursework and/or background in advance computer architecture and programming/scripting skills. Being a hard worker and team player are essential personality traits to be successful in this role. Responsibilities are of a diverse technical nature.
Length of internship: Minimum of 6-9 months, with the possibility to extend/convert as per candidate availability and business needs. This will be a Full Time Internship position.
Job assignments are usually for the one-two semesters including summer and for short periods during breaks.
Qualifications:
Candidate must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork, classes, research and/or relevant previous job and/or internship experiences.
Minimum Qualifications:
The candidate must be pursuing a MS degree in Electrical/ Computer Engineering/ Computer Science or related field and have already obtained a Bachelor's Degree in Electrical/ Computer Engineering/Computer Science or related field.
Required 6+ months of experience in or equivalent coursework in the following areas:
Digital Hardware/Logic Design basics, Computer Organization and Advance Computer Architecture.
Basic Programming (C/C++), BIOS, Operating Systems (Linux, Windows), Python/Shell scripting
Preferred Qualifications:
Background in x64 CPU Architecture, Server System Machine Check Architecture, Operating Systems interactions, Xeon Platform Error Handling Methods.
Prior internship/full-time experience is preferred.
Job Type:
Student / Intern
Shift:
Shift 1 (United States of America)
Primary Location:
US, California, Folsom
Additional Locations:
Business group:
The Data Platforms Engineering and Architecture (DPEA) Group invents, designs & builds the world's most critical computing platforms which fuel Intel's most important business and solve the world's most fundamental problems. DPEA enables that data center which is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies-spanning software, processors, storage, I/O, and networking solutions-that fuel cloud, communications, enterprise, and government data centers around the world.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html
Annual Salary Range for jobs which could be performed in
US, California:$63,000.00-$166,000.00
Salary range dependent on a number of factors including location and experience.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
Job Description:
Data Center Platform Application Engineering (DCPAE) is part of Datacenter and AI (DCAI) organization under Data Platform Engineering and Architecture group.
Reliability, Availability and Serviceability (RAS) DCPAEs are responsible for server platform error handling architecture enablement for a range of Xeon architecture-based cloud and data-center server platform ingredients including CPU, UPI, PCIe, DDR, CXL, BMC, etc. Looking for a graduate degree-level internship candidate with coursework and/or background in advance computer architecture and programming/scripting skills. Being a hard worker and team player are essential personality traits to be successful in this role. Responsibilities are of a diverse technical nature.
Length of internship: Minimum of 6-9 months, with the possibility to extend/convert as per candidate availability and business needs. This will be a Full Time Internship position.
Job assignments are usually for the one-two semesters including summer and for short periods during breaks.
Qualifications:
Candidate must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork, classes, research and/or relevant previous job and/or internship experiences.
Minimum Qualifications:
The candidate must be pursuing a MS degree in Electrical/ Computer Engineering/ Computer Science or related field and have already obtained a Bachelor's Degree in Electrical/ Computer Engineering/Computer Science or related field.
Required 6+ months of experience in or equivalent coursework in the following areas:
Digital Hardware/Logic Design basics, Computer Organization and Advance Computer Architecture.
Basic Programming (C/C++), BIOS, Operating Systems (Linux, Windows), Python/Shell scripting
Preferred Qualifications:
Background in x64 CPU Architecture, Server System Machine Check Architecture, Operating Systems interactions, Xeon Platform Error Handling Methods.
Prior internship/full-time experience is preferred.
Job Type:
Student / Intern
Shift:
Shift 1 (United States of America)
Primary Location:
US, California, Folsom
Additional Locations:
Business group:
The Data Platforms Engineering and Architecture (DPEA) Group invents, designs & builds the world's most critical computing platforms which fuel Intel's most important business and solve the world's most fundamental problems. DPEA enables that data center which is the underpinning for every data-driven service, from artificial intelligence to 5G to high-performance computing, and DCG delivers the products and technologies-spanning software, processors, storage, I/O, and networking solutions-that fuel cloud, communications, enterprise, and government data centers around the world.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits:
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html
Annual Salary Range for jobs which could be performed in
US, California:$63,000.00-$166,000.00
Salary range dependent on a number of factors including location and experience.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
