Address
Form of workInterns will be part of the VLSI team and work with a lead engineer on using Generative AI and Large Language Models to help us build our next generation AI chip. The work willinvolve (but is not limited to) using AI to:
- Make improvements to existing code
- Create tests and assertions to verify the design
- Document the design
Qualifications:
- MS or PhD candidate with coursework including computer architecture
- Experience with Verilog, Python, and C
- Good programming skills, experience with CI/CD and github
- Able to script/install with Linux
- Familiarity with prompt engineering, RAG (retrieval augmented generation), and embeddings
Nice to Have:
- Exposure to RISC-V
- Cache coherence, RISC-V vector knowledge
- Exposure to industry EDA tools for front end design
- Exposure to Verilog
