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Form of workJob Details:
Job Description:
Fab Sort Manufacturing (FSM) is responsible for the production of all Intel silicon using some of the world's most advanced manufacturing processes in fabs in Arizona, Ireland, Israel, Oregon and 2 new greenfield sites in Ohio and Germany. As part of Intel's IDM2.0 strategy, FSM is rapidly expanding its operation to deliver output for both internal and foundry customers with state-of-the-art technologies arriving in high-volume manufacturing at a 2-year cadence going forward. Intel recently created HVM Global Yield organization in FSM to strengthen its yield operation and enable fast-paced yield ramp-up in early HVM phases for each technology in collaboration with Technology Development team and FSM fab managers.
This job requisition is to seek Sr. BEOL (Back-End-Of-Line) Process Integration engineers for our FSM HVM Global Yield organization, reporting to BEOL Process Integration manager. Selected candidates will work with other members in BEOL integration, other teams in Global Yield org, fab module, yield, and TD team members to achieve yield ramp-up and process optimization in early production stage, supporting internal and external customers.
The Sr. BEOL (Back-End-Of-Line) Integration engineer's responsibilities will include (but not limited to):
Candidate should possess the following behavioral skills:
Qualifications:
Minimum Qualifications:
Preferred Qualifications:
#foundry
Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, Arizona, Phoenix
Additional Locations:
Business group:
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
Job Description:
Fab Sort Manufacturing (FSM) is responsible for the production of all Intel silicon using some of the world's most advanced manufacturing processes in fabs in Arizona, Ireland, Israel, Oregon and 2 new greenfield sites in Ohio and Germany. As part of Intel's IDM2.0 strategy, FSM is rapidly expanding its operation to deliver output for both internal and foundry customers with state-of-the-art technologies arriving in high-volume manufacturing at a 2-year cadence going forward. Intel recently created HVM Global Yield organization in FSM to strengthen its yield operation and enable fast-paced yield ramp-up in early HVM phases for each technology in collaboration with Technology Development team and FSM fab managers.
This job requisition is to seek Sr. BEOL (Back-End-Of-Line) Process Integration engineers for our FSM HVM Global Yield organization, reporting to BEOL Process Integration manager. Selected candidates will work with other members in BEOL integration, other teams in Global Yield org, fab module, yield, and TD team members to achieve yield ramp-up and process optimization in early production stage, supporting internal and external customers.
The Sr. BEOL (Back-End-Of-Line) Integration engineer's responsibilities will include (but not limited to):
- Own engineering projects to execute HVM yield roadmap, device targeting and attain performance targets, focusing on Cu BEOL integration.
- Collaborate with BEOL Technology Development team to import new technology to production fabs.
- Work with FEOL/BEOL Integration, Device, Defect Reduction and Yield Analysis team members to identify root cause of yield/performance issues and implement mitigation plan in defined timeline to meet committed production yield/performance targets and to support fast paced yield ramp-up in high-volume manufacturing phases.
- Own NPI (New Product Introduction) in production fabs and perform product-specific process optimizations to meet foundry customers specifications and requirements.
- Own engineering projects to improve product yield, quality, performance and to reduce wafer cost.
- Engineering support for technical interactions with internal and external customers.
Candidate should possess the following behavioral skills:
- Problem-solving technique with strong self-initiative and self-learning capabilities.
- Ability to work with multi-functional, multi-cultural teams.
- Must demonstrate solid communication skills.
Qualifications:
Minimum Qualifications:
- Bachelor's Degree in Engineering or Physics / Electrical Engineering / Chemistry / Material Science or any STEM related field
- 4+ years of experience in advanced node semiconductor industry in Cu BEOL Process Integration.
- Experience in advanced node semiconductor development or high-volume manufacturing.
- Experience in interaction with MOL module (Middle-Of-Line, Contact module).
Preferred Qualifications:
- Advanced degree (Master's or Ph.D.) in Engineering or Physics / Electrical Engineering / Chemistry / Material Science or any STEM related field.
- Experience in project/program management and/or TFT lead.
- Experience in integration in EUV-enabled technology nodes.
- Experience in serving external Foundry customers through technical interactions.
- Demonstrated interpersonal skills including influencing, engaging, and motivating.
- Experience in GAA (Gate-All-Around) technology architecture.
- Experience in new semiconductor technology development.
- Basic understanding and collaboration experience with module processes including lithography, dry etch, wet etch, CMP, thin films and metrology.
#foundry
Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, Arizona, Phoenix
Additional Locations:
Business group:
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
