Semiconductor Design Engineer

We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost-effectively. Together, Teradyne companies deliver manufacturing automation across industries and applications around the world!
Organization & Role
The Teradyne Hardware Engineering team is seeking an FPGA/ASIC Design Engineer with 2+ years of product development experience to work with a multi-disciplined team to design, code, and verify FPGAs in our cutting-edge products in a fast-paced, process-oriented environment. This role requires 4 days on site in North Reading, MA.
Responsibilities

• Deriving requirements from higher level specifications
• Writing design documents
• Designing and implementing register-transfer-level (RTL) code using Verilog
• Designing with Vendor IPs and various industry standard interface protocols
• Use of digital simulation tools to verify designs.
• Creation of physical design constraints for placement, timing closure and CDC
• Implementation of designs into target technologies using synthesis and place and route tools
• Perform timing analysis using static timing analysis tools.
• Perform lab debug of designs with laboratory equipment such as Logic Analyzers and oscilloscopes.
• Collaboration with other logic designers, board designers, software designers and ASIC designers
• Communicating status to project leadership

Basic Qualifications & Skills

• Knowledgeable in digital logic design
• Experience in logic design writing RTL in Verilog HDL
• Familiarity with a scripting language such as Python, TCL and Perl
• Experience with physical design tools from FPGA vendors (Vivado or Quartus) or ASIC vendors.
• Ability to debug difficult problems using a variety of software and hardware tools (debugger, JTAG emulator, logic analyzer, and oscilloscope)
• Highly motivated, team player, willing to pick up any piece of code, with a can-do attitude, and attracted to challenging opportunities
• Excellent written and oral communication skills
• Familiarity with high-speed serial protocols including PCIe and Ethernet.
• Familiarity with a digital simulation tool such as Synopsys, Cadence, or Mentor
• High Speed digital circuit design
• Familiarity with C/C++
• Familiarity in the use of a source control tools
• Familiarity working in a Linux based development environment

Teradyne is not considering candidates who require sponsorship for this position
Education

• BS in EE with 2+ years of experience or MS with 0+ years of experience.

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