Job Description
Duration: 6 mos min.
Type: Contract
Location: Remote
Responsibilities:
- Conception and implementation of chip-level mixed-signal simulation environments (test benches, run scripts, etc...).
- Develop self-checking simulations and models.
- Establish the AMS Verification Plan
- Coordinate the verification tasks and respect schedules and deadlines
- Progress reporting and communication with Tier 1 customers
Qualifications:
- MS or PhD in Electrical Engineering
- The candidate should have at least 5 years of experience in AMS verification.
- Must be knowledgeable in both analog and digital design fundamentals.
- Must have good debug analysis skills.
- Good communication skills (written and verbal)
- Proactive and detail-oriented
- Expertise in following tools and standards:
- Cadence AMS designer (both ADE-XL/Maestro and command-line)
- Hierarchy Editor configuration and verilog configurations
- Custom connect modules and connect rules and/or IE cards
- Spice/Spectre/APS/XPS simulator: able to solve slowness, convergence issues.
- Real-Number Modeling: wreal, SV, User-defined Types/Nets (EE package)
About Tessolve:
Technological innovation has accelerated at an unprecedented pace in the recent years and so have the disruptions in the sector of Silicon engineering – complex IC development, increasing failures, inadequate facilities for design, development and testing. At Tessolve, we address these disruptions, helping Semiconductor product companies in Semiconductor IC Design, Test & Product Engineering, PCB Design, Failure Analysis and Systems design. An enabler of smooth design and productization of chips, we leverage our in-house infrastructure, quality excellence practices and cost-effective approaches to bring value driven solutions and services. https://tessolve.com/