SoC Cache Architecture Performance Modeling Engineer, Platform Architecture

As a SoC Cache Architecture Performance Modeling Engineer, you will collaborate with engineers across the organization to model and improve the hardware and low-level software architecture of our chips by using a high-performance C++ simulator. You will be involved with the full life-cycle of Performance Modeling, from early architectural exploration to post-silicon correlation. The role requires deep expertise in the architecture and design of SoC caches, how they are used by the different SoC components such as CPU, GPU, Display, Camera, Machine Learning, and how they interact with the other parts of the memory system. It also requires appreciating the good parts of C++, and using the language to enhance the utility of our simulation models.