Senior Fpga Design Engineer jobs in California

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ASIC/RTL DESIGN ENGINEER - SENIOR (US)

ASIC/RTL Design Engineer - Senior (US) 6 months contract (W2) Location: Santa Clara, CA 95054. Onsite/Hybrid (3x per week)Alternate location: Colorado office - 3100 Logic Dr, LongmontLocation: Santa Clara, CA - Onsite/Hybrid (3x p...

CompanyObjectwin Technology
AddressSanta Clara, CA
CategoryInformation Technology
Job typeContractor
Date Posted 2 months ago See detail

ASIC/RTL Design Engineer - Senior (US)

Objectwin Technology

Santa Clara, CA

ASIC/RTL Design Engineer - Senior (US) 6 months contract (W2) Location: Santa Clara, CA 95054. Onsite/Hybrid (3x per week)Alternate location: Colorado office - 3100 Logic Dr, LongmontLocation: Santa Clara, CA - Onsite/Hybrid (3x p...

ASIC Design Engineer, Senior Staff

Alphawave Semi

Milpitas, CA

Health Insurance. Retirement Savings. Paid time off....

ASIC/RTL Design Engineer - Senior

Tekwissen Llc

Santa Clara, CA

Responsible for the development of complex multi-mode / multi-corner timing constraints that are compatible for RTL and signoff . Drive the effort to maintain RTL quality metrics in complex, hierarchical designs and automating tha...

Senior ASIC Design Engineer - Hardware

Energy Jobline In

Santa Clara, CA

NVIDIA is a learning machine that constantly evolves by adapting to new opportunities that are hard to solve, that only we can take on, and that matter to the world. You will use Perl to improve the productivity of the above tea...

Senior Engineer, FPGA Verification

Samsung Semiconductor

San Jose, CA

FPGA architecture, design, verification, lab bring-up, lab test, and validation of an FPGA prototype for storage applications. Research next-generation memory and storage controller features in an FPGA environment. Develop new IP...

Senior ASIC/VLSI Synthesis and Design Engineer

Celestial Ai

Santa Clara, CA

Develop and implement high-performance, low-power, and area-efficient digital designs for ASICs and SoCs using industry-standard EDA tools. Work closely with design teams to understand the requirements and constraints of the desig...

Senior Engineer, Digital Design

Samsung Semiconductor

San Jose, CA

Creating micro-architecture and detailed design documents wireline high speed interface protocol layer with performance, power, area requirements. RTL design with Verilog or SystemVerilog. Lint, CDC, STA, formal verification, ECO,...

Senior Aircraft Design and Analysis Engineer

Joby Aviation

Santa Cruz, CA

Aerodynamic analysis. Recent demonstrated experience with aerodynamic analysis using computational methods (e.g., vortex lattice) on aircraft. Vertical-lift experience is a plus.. Aircraft aerodynamic design. Recent demonstrated...