Achronix Semiconductor Corporation jobs
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(6200-1023) STAFF/SR. ENGINEER (VERIFICATION)
Define the test plan and setup the verification environment at unit and chip level. Write constrained-random and directed testcases in Verilog/System Verilog/UVM to verify RTL functionality. Run functional simulations and regressi...
Company | Achronix Semiconductor Corporation |
---|---|
Address | Santa Clara, CA |
Category | Information Technology |
Job type | Full-Time |
Date Posted | a month ago See detail |
(6200-1023) Staff/Sr. Engineer (Verification)
Achronix Semiconductor Corporation
Santa Clara, CA
Define the test plan and setup the verification environment at unit and chip level. Write constrained-random and directed testcases in Verilog/System Verilog/UVM to verify RTL functionality. Run functional simulations and regressi...
a month ago seen See more...