Company

Samsung SemiconductorSee more

addressAddressSan Jose, CA
type Form of workFull-Time
CategoryEducation/Training

Job description

What You'll Do

Samsung Semiconductor, Inc. is a world leader in Memory, System LSI and LCD technologies. We are currently looking for an exceptional senior FPGA engineer to join our team in San Jose, CA.

The Memory Solutions Lab (MSL) is part of Samsung's Memory Business Unit, the industry's technology and volume leader in DRAM, NAND Flash, SRAM memory. MSL's vision is to solve key problems and optimize architecture solutions for Cloud & Data center environments. We are an integral part of Samsung's strong R&D focus & lab innovation engine. We work closely with development teams to bring feature innovation to product roadmaps.

We are currently looking for a tech leader, pre and post silicon IP Verification & Validation to join our team in San Jose, CA. The Candidate will be a key technical member of System Architecture Lab.  He or she will join a team of experts in researching and developing innovative data center/ cloud networking, storage, and compute ASIC/ FPGA and system solutions. The ideal candidate must have prior experience developing leading edge networking, memory, storage, and/or embedded computing solutions on ASIC/SoC/FPGAs.

 Location: Hybrid, working onsite at our San Jose, CA headquarters 3 days a week, with the flexibility to work remotely the remainder of your time.

Job ID: 41694

  • Define verification architecture, implement verification environment for RTL IP designs that use advance verification methodologies and meet established content, performance, quality, cost and schedule goals. Define lab bring-up plans, drive lab bring-up and Validation of IP using FPGA/SoC/ASIC prototype devices. Lead and manage a team of Verification and Validation engineers. 
  • Manage and lead a team of Verification and Validation engineers. 
  • Define overall pre and post silicon IP Verification and Validation strategies, methodologies, and simulation environment.
  • Work with RTL designers, software/firmware engineers, system architects and verification engineers to develop verification requirements and test plans based on specifications.
  • Develop, maintain and publish Verification and lab validation specifications.
  • Analyze and debug simulation and lab failures.
  • Generate code coverage and functional coverage reports.
  • Participate in the development of department level processes, including the documentation of processes and procedures, and recommendations for improvements to existing processes.
  • Create, track, and close bugs in bug tracking tool.
  • Perform the constraint assertion based verification.
  • Manage the regression analysis.
  • Develop lab bring-up plans for the IPs, procure and set-up necessary lab equipment.
  • Drive lab bring-up and Validation of IPs using FPGA/SoC/ASIC prototype platforms.
  • Assist software architects developing Linux/ Windows device driver, test and debug.

What You Bring

  • BS in Computer/Electrical/Electronic Engineering or Computer Science, and 20 years of relevant       experience or a MS in Computer/Electrical/Electronic Engineering or Computer Science with 18 years of relevant experience preferred
  • Minimum 3 years of direct people management experience.
  • Good understanding of computer architecture, logic, IP design.
  • Strong knowledge with ASIC Simulation Tool & Verification Language: all sign-off simulators, Verdi.
  • Fluent in verification language such as UVM/OVM/RVM/System Verilog, Verilog.
  • Knowledge of functional coverage, code coverage.
  • Strong scripting skills in Perl, Python, shell etc.
  • Experience with lab bring-up using protocol analyzers, other lab equipment.
  • Experience in writing Test-plans, and creating directed and random test cases.
  • Experience in writing lab bring-up and Validation plans.
  • Experience with hands-on lab prototype set up, testing, performance measurement and debug of memory and/or storage solutions.
  • Hands-on experience with hardware board bring-up, server system integration and software integration.
  • Solid knowledge of PCIe, CXL, NVMe, DDR, AXI, PIPE protocols.
  • Strong problem solving skills to quickly identify and provide solutions under tight schedule pressure.
  • Must be highly motivated with excellent verbal and written communication skills.
  • Demonstrated attention to detail.
  • Ability to meet aggressive project deadlines in a team environment.
  • Ability to work successfully with cross-functional teams, including coordinating across organizational boundaries and geographies.
  • Comfortable working in a multinational environment and understands how to leverage cultural diversity.
  • You're inclusive, adapting your style to the situation and diverse global norms of our people.
  • An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
  • You're collaborative, building relationships, humbly offering support and openly welcoming approaches.
  • Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-SF1

Refer code: 7113287. Samsung Semiconductor - The previous day - 2023-12-16 12:09

Samsung Semiconductor

San Jose, CA
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