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Form of workJob Description
Responsibilities:
Want to be part of our nation’s highest national security priorities? The Engineering Operations department is seeking highly motivated I/C Design Engineers for our Odon, Indiana office,
Remote work is an option and currently being evaluated.
This office supports a growing technological ecosystem, boasting over sixty high-tech companies, a leading government lab, cutting-edge academic research, and over 5,000 technical professionals.
The facility is situated just south of Bloomington, Indiana, rated by Livability in ‘21 as one of the top places to live in the U.S.
As a team member, you will be on the ground floor as we build out engineering capability to design next-generation strategic missile guidance and control systems that operate in hostile military and space environments, all while expanding our nation’s preeminence in microelectronics for national security. You will be a key member of our nationally distributed team, called upon by our government and academic partners to produce exquisite and robust solutions to some of our nation’s most important technical challenges.
Would you enjoy the challenge of designing integrated circuits for extreme environments and unique applications – from outer space to inside the human body?
The Analog/Mixed-Signal IC Group develops analog, mixed-signal, and RF application-specific integrated circuits (ASIC) for national security, space, biomedical applications, and more. We regularly engage with other engineers and scientists from all divisions in a dynamic, interdisciplinary environment. This is a hybrid role located within driving distance of Odon, Indiana.
Required Qualifications:
- BS with 4+ years of experience designing integrated circuits
- Experience designing analog and/or mixed-signal circuits such as amplifiers, ADC/DAC, PLL or other timing circuits, high-speed I/O
- Cadence Virtuoso
Preferred Qualifications:
- MS with experience designing integrated circuits
- Experience with low power energy harvesting and power conditioning
- DDR/LPDDR PHY IP design, specifically with DDR3/4 standards; 10Gb SerDes/PHY design
- Experience with MOS advanced nodes below 32nm
- Experience with radiation-hardened electronics
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