Company

Cirrus LogicSee more

addressAddressChandler, AZ
type Form of workFull-Time
CategoryEngineering/Architecture/scientific

Job description

For nearly four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar team thrives on solving complex challenges with innovative end-user solutions for the world's top consumer brands. Cirrus Logic is also known for its award-winning culture, built on a foundation of inclusion and fairness, meaningful community engagement and delivering enjoyable employee experiences at every turn. But we couldn't do it without our extraordinary workforce – and that's where you come in. Join our team and help us continue to make Cirrus Logic an exceptional place to grow your career!

Join our silicon design team and work closely with verification engineers, analog designers, applications engineers, and manufacturing test, participating in all aspects of design for complete mixed-signal IC developments of innovative audio processing solutions. You will be working with a talented Digital Design group, designing digital components to complement the analog portion of the designs.
RESPONSIBILITIES:
  • Design using Verilog, logic simulation, functional verification, and synthesis of DSP and data conversion ICs in a mixed signal environment.
  • Implement RTL modules and work with design team with integration and integrated functional verification.
  • Responsibilities will also include support activities such as behavioral modeling of analog and mixed signal circuits and working with the verification team on our products
  • Regression debug support and other flow/infrastructure development
REQUIRED KNOWLEDGE, SKILLS AND EXPERIENCE:
  • Digital design techniques using System Verilog / Synopsys design methodology
  • Digital signal processing using Matlab
  • Experience using place and route tools is preferred
  • This opportunity is available only to students currently enrolled in a MS or PhD program in Electrical Engineering maintaining a GPA of 3.6 or above, and who will be returning to school for at least one semester following completing of his/her internship.
  • Candidate must be available for full time employment during the internship period.
PREFERRED KNOWLEDGE, SKILLS AND EXPERIENCE
  • Experience with UVM
  • Scripting (e.g. Perl, Python, Unix/Linux shell)
  • Knowledge of signal processing concepts, Matlab
  • Object oriented programming (e.g. SystemVerilog)
This internship is on-site. This opportunity is available for the summer semester only. It is available only to students currently enrolled in a MS or PhD program in Electrical Engineering maintaining a GPA of 3.6 or above, and who will be returning to school for at least one semester following completion of his/her internship. Candidate must be available for full-time employment during the internship.

Diversity drives innovation at Cirrus Logic. Different approaches, ideas and points of view are both valued and respected, and employees are rewarded for their skills, experience and performance. Additionally, Cirrus Logic is an Equal Opportunity/Affirmative Action Employer, and we do not discriminate on the basis of race, color, national origin, pregnancy status, marital status, gender, age, religion, physical or mental disability, medical condition, veteran status, sexual orientation, gender identity, genetic information or any other characteristic protected by law.

PI233920567

Refer code: 7391409. Cirrus Logic - The previous day - 2023-12-22 06:06

Cirrus Logic

Chandler, AZ
Popular Digital Design Engineer jobs in top cities

Share jobs with friends

Related jobs

Intern, Digital Design Engineer (Sd-177)

Digital Design Engineer - PMIC

Marvell Semiconductor, Inc.

paid time off, flex time, 401(k)

Chandler, AZ

a month ago - seen

Senior Digital Design Engineer

General Dynamics Mission Systems, Inc

Scottsdale, AZ

2 months ago - seen

Electrical Engineer: Digital and Analog Design

The Sensor Group Llc

Tucson, AZ

3 months ago - seen

RTL Design Engineer

ACL Digital

Chandler, AZ

6 months ago - seen