FPGA Design Engineer
$100-130 per hour
Education
BSEE or MSEE (Preferred) or equivalent experience.
Experience
$100-130 per hour
Education
BSEE or MSEE (Preferred) or equivalent experience.
Experience
- 10-15 years of complex FPGA design, and/or design verification and validation.
- Highly proficient use and understanding of FPGA engineering concepts, principles, and theories.
- Highly proficient in FPGA design languages and tools including VHDL and UVM or OSVVM.
- Altera High Level Synthesis is preferred.
- Experience with FPGA development software - Modelsim, Quartus, Mentor CDC a plus.
- VHDL, System Verilog, UVM.
- Questa Sim, Modelsim, Quartus.
- GIT, JIRA.
- MATLAB and SimuLink.
- Determine architecture, system verification and detailed design approach.
- Define module interfaces and all aspects of device design and simulation coordinated with the PC Board Designers.
- Evaluate the process flow including but not limited to high level design, synthesis, place and route, timing constraints and power utilization.
- Develop test, simulation plans and design verification test plans at design top level.
- Develop, implement and supervise design verification test plans at system level.