Custom Circuit Methodology Engineer

As a team member of the Methodology Design team, you will be involved with all aspects of physical design of high performance PHY design from RTL to delivery of our final GDSII. Your responsibilities include but are not limited to: Provide innovative solutions to customize and improve quality and efficiency of mixed-signal design. Work with RTL and physical design teams to implement and customize design flows that are optimal for different IPs. Provide documentation, training and new- user-support. Responsible for diagnosis, resolution, regression of reported problems. Generate block/ chip level static timing constraints. Create full chip floor-plan including pin placement, partitions and power grid. Develop and validate high performance low power clock net work guidelines. Perform block level place and route and close the design to meet timing, area and power constraints. Generate and Implement ECOs to fix timing, noise and EM IR violations. Run physical design verification flow at chip/block level and provide guidelines to fix LVS/DRC violations to other designers. Participate in establishing design methodologies for correct by construction designs. Assist in flow development for chip integration.