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Job Description:
This position is with the Design Engineering Group (DEG) in Hillsboro, Oregon. The DEG Atom team is chartered with designing the latest Intel processors using the most advanced and innovative process technologies.
In this role responsibilities include, although not limited to:
Qualifications:
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences. This is an entry level position and will be compensated accordingly.
Minimum Qualifications:
The candidate must have a bachelor's degree and 1+ year experience in Electrical Engineering, Computer Science, Computer Engineering or any STEM related degree having studied areas including CPU micro-architecture OR a master's in electrical engineering, Computer Science, Computer Engineering having studied areas including CPU micro-architecture.
1+ year of experience or knowledge in any of the following:
- Areas such as out-of-order execution, power management, DFT, system debug, ATPG, BIST, UPF, low power design, processor pipelines, Memory load or store, Cache Coherency, Paging etc.
- PreSi System Verilog RTL verification flow and environments, including test plans, test writing, and Coverage.
Preferred Qualifications:
- CPU assembly, Verilog and/or System Verilog, OVM, Perl, Linux, hardware modeling, and Assertions.
- Experience in testbench architecture and hands-on development of components like BFMs, checkers, transactors, monitors and others using verification methodologies like System-Verilog, VMM/OVM/UVM or equivalent is highly desirable.
- Proficiency in independent debug of System Verilog RTL failures to root-cause functional bugs.
- Directed or Constrained-Random test-writing skills.
- Research publications, patent filings, or other evidence of personal technical innovation in validation methodology advancement.
Job Type:
College Grad
Shift:
Shift 1 (United States of America)
Primary Location:
US, Oregon, Hillsboro
Additional Locations:
US, Texas, Austin
Business group:
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel's products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore's Law and groundbreaking innovations. DEG is Intel's engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
Job Description:
This position is with the Design Engineering Group (DEG) in Hillsboro, Oregon. The DEG Atom team is chartered with designing the latest Intel processors using the most advanced and innovative process technologies.
In this role responsibilities include, although not limited to:
- Develops Pre-Silicon functional validation tests to verify system will meet design requirements.
- Creates test plans for RTL validation, defining and running system simulation models, and finding and implementing corrective measures for failing RTL tests.
- Analyzes and uses results to modify testing.
Qualifications:
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences. This is an entry level position and will be compensated accordingly.
Minimum Qualifications:
The candidate must have a bachelor's degree and 1+ year experience in Electrical Engineering, Computer Science, Computer Engineering or any STEM related degree having studied areas including CPU micro-architecture OR a master's in electrical engineering, Computer Science, Computer Engineering having studied areas including CPU micro-architecture.
1+ year of experience or knowledge in any of the following:
- Areas such as out-of-order execution, power management, DFT, system debug, ATPG, BIST, UPF, low power design, processor pipelines, Memory load or store, Cache Coherency, Paging etc.
- PreSi System Verilog RTL verification flow and environments, including test plans, test writing, and Coverage.
Preferred Qualifications:
- CPU assembly, Verilog and/or System Verilog, OVM, Perl, Linux, hardware modeling, and Assertions.
- Experience in testbench architecture and hands-on development of components like BFMs, checkers, transactors, monitors and others using verification methodologies like System-Verilog, VMM/OVM/UVM or equivalent is highly desirable.
- Proficiency in independent debug of System Verilog RTL failures to root-cause functional bugs.
- Directed or Constrained-Random test-writing skills.
- Research publications, patent filings, or other evidence of personal technical innovation in validation methodology advancement.
Job Type:
College Grad
Shift:
Shift 1 (United States of America)
Primary Location:
US, Oregon, Hillsboro
Additional Locations:
US, Texas, Austin
Business group:
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel's products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore's Law and groundbreaking innovations. DEG is Intel's engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
