Job description
- Job Duty 1 - Develop test structure layout per specified requirements, using industry standard (EDA) tools including Cadence Virtuoso Design Environment.
- Job Duty 2 - Develop layout regression testcases for Design Rule Checking (DRC) decks based on specified Design Rule Manual (DRM) requirements, using industry standard (EDA) tools including Client IC Validator.
- Job Duty 3- Develop manual layout cells per specified requirements, using industry standard (EDA) tools including Cadence Virtuoso Design Environment.
- Job Duty 4 - Develop regression testcases for Layout Versus Schematic (LVS) decks based on specified Design Rule Manual (DRM) and device list requirements, using industry standard (EDA) tools including Client IC Validator.
- Job Duty 5 - Interpret Design Rules. Work closely with Design Rule engineers and DRC / LVS development engineers to validate DRC / LVS decks.
- Job Duty 6 - Work on automated regression testcase projects to increase efficiency and coverage of regressions, using Python to create testcases.
- Job Duty 7 - Debug and solve problems in a team environment.
Refer code: 9138781. Eteam - The previous day - 2024-04-26 12:39
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