SoC Performance Modeling Opportunities at Apple

Below are the various areas you can explore within Platform Architecture SoC Performance: SoC Memory Performance: Our group focuses on balancing the performance and power of the memory system across all Apple products. The work includes the detailed modeling of Apple memory controllers for different memory technologies, microarchitecture fine tuning, and architectural exploration of future memory technologies. The role in this group has close collaboration with CPU, GPU, ML, and SoC architects and design teams. Experience with power modeling in addition to performance, and/or prior work on memory controller scheduler is a plus. SoC Cache Performance: Our group is building and maintaining the simulation models for the cache architecture in Apple’s SoCs. We deeply analyze how real-world applications use the memory system to develop a better caching architecture for CPU, GPU, ML, Display, Camera, etc., and we use our modeling to provide guidance for future products on the optimal cache architecture, policy trade-offs and technology direction. We are looking for engineers who have a deep passion for creating hardware models at both higher levels and the detailed design level, and are enthusiastic about innovating new ways to make our caches more effective, including machine learning techniques. SoC QoS Performance: The engineers on this team solve challenging problems in the area of quality-of-service (QoS) and use case performance. SoC going into Apple devices has dozens of IPs. The IPs share resources such as fabric, system cache and DRAM, but their performance requirements differ and vary from low latency, high bandwidth to real time with deadline. The team is responsible for defining the requirements and ensuring to build SoC architecture and design which satisfy them, by using (and developing) SoC-level performance simulators with future looking use cases or Silicon traces or a mix of the two. The work is done through close collaboration with the other SoC architects, IP, design, and Silicon teams. SoC Performance Validation: This group drives the performance and quality-of-service analysis and validation for the SoCs that form the heart of Apple products like the Apple Watch, iPhone, iPad, MacBook, and Vision Pro products, to ensure that the next Apple silicon will flawlessly meet all the performance requirements. Our group leverages both analytical and event-driven models, and we build and maintain the pipelines for automated simulation, data collection, processing, and analysis. We work closely with architecture, design, and silicon teams to deliver this mission-critical work. We look for individuals who enjoy being in a highly cross-functional role and are not shy to question the status quo and push for innovation.