Senior Member of Technical Staff, ASIC
Full Time opportunity in Santa Clara, CA
Job Summary:
Looking for an experienced Digital Design Engineer to join their small team of designers. This role will include design and verification of signal processing modules, interfaces, control blocks and other functions on FPGAs and ASICs. The ideal candidate will be self-motivated and prepared to challenge the status quo to ensure that all designs are the most power and area efficient possible.
This position is onsite in Santa Clara, CA
Job Responsibilities:
The full design flow for digital modules in FPGAs and ASICs, including, but not limited to: design, simulation, synthesis, timing closure, BIST, test vector generation and debug.
- Design and verification of interface circuits involving high-speed interface or protocols such as USB, Serdes, or PCIe.
- DFT or scan insertion.
- Digital design interfacing to analog modules, such as ADCs or PLLs.
- Board level design or verification.
- Develop and execute code on FPGAs
- Lab bring-up and testing.
- Python, Assembly or C programming.
Education/Experience Requirements:
- A BSc. with a minimum of 6 years of relevant experience or an MSc. with 4 years of experience in digital design and verification.
- Experience with simulation, verification, synthesis (Synopsys or Cadence tool), STA, timing closure, chip tapeout and bring-up.
- Micro-architecture design.
- Implementation experience with fixed-point DSP based on MATLAB or C models.
- Experience with FPGAs